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ISSN: 2321-9939 | ESTD Year: 2013

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Paper Title
Comparison of Conventional Multiplier with Bypass Zero Multiplier
  Kalyani Chetan Kumar,  Shrikant Deshmukh,  Prashant Gupta

Low power is one of the most important designing factors in today’s VLSI design market because we need to meet the Moore’s law and as per customers requirements so we can either reduce static or dynamic power. So basically here in this paper dynamic power reduction is performed on the multiplication circuit because multiplier is one of the most important circuits of many important digital circuits so power reduction of this is one of the important parameter to concern these days. In this work another low power architecture is implemented which is called as bypass zero feed a directly (BZFAD) which usually reduces the switching activity and on the basis of that total dynamic power reduces. Finally comparison is done for both the multiplier and results are shown on the basis of that we can say that BZFAD is much more optimized in terms of power and area.

Keywords- Bypass zero feed a direct (BZFAD), Radix 4 booth multiplier, Conventional Multiplier, Ring Counter, Low power.
Publication Details
Unique Identification Number - IJEDR1403027
Page Number(s) - 3061-3065
Pubished in - Volume 2 | Issue 3 | Sept 2014
DOI (Digital Object Identifier) -   
Publisher - IJEDR (ISSN - 2321-9939)
Cite this Article
  Kalyani Chetan Kumar,  Shrikant Deshmukh,  Prashant Gupta,   "Comparison of Conventional Multiplier with Bypass Zero Multiplier ", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.2, Issue 3, pp.3061-3065, Sept 2014, Available at :http://www.ijedr.org/papers/IJEDR1403027.pdf
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