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Paper Details
Paper Title
p-mean Model impact on VLSI Placement
Authors
B N Bhramar Ray
Abstract
In this paper we compare the impact of of p-mean Half-perimeter wirelength (HPWL) model on analytical placement of VLSI. against logarithm-sum-expontial (LSE) wirelength model, weighted average(WA) [3]and (γ,p)[8] wirelength models.. Deployment of the wirelength model in analytical placement engine produces 12%, 10% and 1% shorter wirelength than widely used LSE and recently proposed weighted average(WA) [3]and (γ,p)[8] wirelength models.
Keywords- VLSI; analytical placemet; wirelength; simulated annealing
Publication Details
Unique Identification Number - IJEDR1503009Page Number(s) - Pubished in - Volume 3 | Issue 3 | July 2015DOI (Digital Object Identifier) - Publisher - IJEDR (ISSN - 2321-9939)
Cite this Article
B N Bhramar Ray, "p-mean Model impact on VLSI Placement", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.3, Issue 3, pp., July 2015, Available at :http://www.ijedr.org/papers/IJEDR1503009.pdf
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