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INTERNATIONAL JOURNAL OF ENGINEERING DEVELOPMENT AND RESEARCH
(International Peer Reviewed,Refereed, Indexed, Citation Open Access Journal)
ISSN: 2321-9939 | ESTD Year: 2013

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Paper Title
Design and Implementation of Serial Peripheral Interface Protocol Using Verilog HDL
Authors
  Fareha Naqvi

Abstract
The objective of this paper is the design and implementation of SPI (serial peripheral interface) master and slave using verilog HDL. The SPI (serial peripheral interface) is a type of serial communication protocol that transfers synchronous serial data in full duplex mode. There are two modes of communications in SPI viz., master and slave. While the master device generates serial clock, the slave devices are allowed with individual slave select lines and the whole design is simulated and synthesized with Xilinx ISE design suite 13.3.1

Keywords- SPI (serial peripheral interface), Verilog HDL.
Publication Details
Unique Identification Number - IJEDR1503092
Page Number(s) - 1-5
Pubished in - Volume 3 | Issue 3 | September 2015
DOI (Digital Object Identifier) -   
Publisher - IJEDR (ISSN - 2321-9939)
Cite this Article
  Fareha Naqvi,   "Design and Implementation of Serial Peripheral Interface Protocol Using Verilog HDL", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.3, Issue 3, pp.1-5, September 2015, Available at :http://www.ijedr.org/papers/IJEDR1503092.pdf
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