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ISSN: 2321-9939 | ESTD Year: 2013

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Paper Title
Improved SNR Integrator Design with Feedback Compensation for ∑∆ Modulator
  Varun Mishra,  Abhishek Bora,  Vishal Ramola

This paper represents a method to improve the SNR and linearity of an integrator by feedback compensation technique. The discussed design reduces signal swing while keeping advantages of both feed-forward as well as feedback topology without changing the signal transfer function. SNR and linearity are related to the output of an integrator. Reduced SNR and non-linearity resulted because of the integrator’s output swing that is due to change in input. Proposed integrator design significantly increases the SNR. This integrator is designed using 180nm CMOS technology.

Keywords- Sigma-Delta modulator, feed-forward compensation, feedback compensation, operational amplifier.
Publication Details
Unique Identification Number - IJEDR1602247
Page Number(s) - 1387-1391
Pubished in - Volume 4 | Issue 2 | June 2016
DOI (Digital Object Identifier) -   
Publisher - IJEDR (ISSN - 2321-9939)
Cite this Article
  Varun Mishra,  Abhishek Bora,  Vishal Ramola,   "Improved SNR Integrator Design with Feedback Compensation for ∑∆ Modulator", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.4, Issue 2, pp.1387-1391, June 2016, Available at :http://www.ijedr.org/papers/IJEDR1602247.pdf
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