Low Cost Journal,International Peer Reviewed and Refereed Journals,Fast Paper Publication approved journal IJEDR(ISSN 2321-9939) apply for ugc care approved journal, UGC Approved Journal, ugc approved journal, ugc approved list of journal, ugc care journal, care journal, UGC-CARE list, New UGC-CARE Reference List, UGC CARE Journals, ugc care list of journal, ugc care list 2020, ugc care approved journal, ugc care list 2020, new ugc approved journal in 2020, Low cost research journal, Online international research journal, Peer-reviewed, and Refereed Journals, scholarly journals, impact factor 7.37 (Calculate by google scholar and Semantic Scholar | AI-Powered Research Tool)
(International Peer Reviewed,Refereed, Indexed, Citation Open Access Journal)
ISSN: 2321-9939 | ESTD Year: 2013

Current Issue

Call For Papers
June 2023

Volume 11 | Issue 2
Last Date : 29 June 2023
Review Results: Within 12-20 Days

For Authors


Indexing Partner

Research Area


Paper Details
Paper Title
128 *128 SRAM in Cooperating Ultra Low Power Technique
  Mitali Agarwal ,  Taru Tavatiyia,  Nitin Sehgal

he primary technique used for power reduction is self-timed architecture. Memory timing circuits need a delay element which tracks the bit-line delay but still provide a large swing signal which can be used by the subsequent stages of the control logic. The key to building such a delay stage is to use a delay element which is a replica of the memory cell connected to the bit-line, while still providing a full swing output. This technique uses a dummy column and dummy row in the RAM to control the flow of signals through the core. This section explores the self-timed technique for the SRAM. The circuit diagram of self-timed IO block .The technique for achieving this uses a “dummy column” in the RAM to control the flow of signals through the core. A dummy column is an additional column of bit-cells. Bit-cells in the dummy column are forced to a known state by shorting one of the internal nodes to a given voltage.

Keywords- Ultra low power SRAM, Row Decoder ,Sense amplifier ,Write driver circuit.
Publication Details
Unique Identification Number - IJEDR1602298
Page Number(s) - 1678-1681
Pubished in - Volume 4 | Issue 2 | June 2016
DOI (Digital Object Identifier) -   
Publisher - IJEDR (ISSN - 2321-9939)
Cite this Article
  Mitali Agarwal ,  Taru Tavatiyia,  Nitin Sehgal,   "128 *128 SRAM in Cooperating Ultra Low Power Technique", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.4, Issue 2, pp.1678-1681, June 2016, Available at :http://www.ijedr.org/papers/IJEDR1602298.pdf
Share This Article

Article Preview

ISSN Details

DOI Details

Providing A digital object identifier by DOI
How to get DOI?

For Reviewer /Referral (RMS)

Important Links

NEWS & Conference

Digital Library

Our Social Link

© Copyright 2024 IJEDR.ORG All rights reserved