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Paper Details
Paper Title
Design of High Speed, Low Power and Wide range Ripple Detector for On-Chip testing in CMOS Technology
Authors
T. Vasudha, Dr. S.P.Venu Madhava Rao
Abstract
On chip testing is an attractive solution for testing of analog integrated circuits. In this paper a low power , built in CMOS Ripple Detector is presented for the purpose of detecting the ripples in the supply rails and specifies its application for On chip testing. The detector works on the principle of RMS detection. The circuit outputs a DC signal that is proportional to the peak to peak amplitude of input ripple. The detector can detect a peak to peak ripple voltage in the range of 8mV to 100mV on a 1.2 Volts supply over an operating frequency of 220MHz , and consumes 3mW power. The detection time is reported to be 0.5ns. Implementation of the detector is carried out in 65nm CMOS technology.
Keywords- supply ripple, on chip testing, detection time, low power, power management
Publication Details
Unique Identification Number - IJEDR1603145Page Number(s) - 898-903Pubished in - Volume 4 | Issue 3 | September 2016DOI (Digital Object Identifier) - Publisher - IJEDR (ISSN - 2321-9939)
Cite this Article
T. Vasudha, Dr. S.P.Venu Madhava Rao, "Design of High Speed, Low Power and Wide range Ripple Detector for On-Chip testing in CMOS Technology", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.4, Issue 3, pp.898-903, September 2016, Available at :http://www.ijedr.org/papers/IJEDR1603145.pdf
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