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INTERNATIONAL JOURNAL OF ENGINEERING DEVELOPMENT AND RESEARCH
(International Peer Reviewed,Refereed, Indexed, Citation Open Access Journal)
ISSN: 2321-9939 | ESTD Year: 2013

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Paper Title
Design and Implementation of a Cockcroft-Walton voltage Multiplier circuit
Authors
  Vipul V. Nandedkar,  Nigrodh B. Narnaware

Abstract
This paper primarily describes a Cockcroft Walton voltage multiplier circuit. The objective of the project is to design a voltage multiplier which should be able to multiply voltage from an input as low as 12 Volts to a maximum output of approximately 200 Volts. Designing of the circuit is based on Cockcroft Walton Principle that consist of ladder network of Capacitor and Diodes. This project studies the application of this multiplier circuit in high voltage application’s implementation in which high discharge rate of capacitors is expected with low output current .Selection of Capacitors and proper diodes is one of the very important aspect considered while designing the circuit. Using the same principle, a relative study is done and results are discussed regarding stepping up of voltages from a single phase input to output voltage up to 3kV(Kilovolts).The hardware of the said circuit is studied and implemented after study of the ladder network. Finally, the results are compiled from the simulations done on MATLAB 2013-b.

Keywords- Voltage multiplier
Publication Details
Unique Identification Number - IJEDR1702044
Page Number(s) - 261-264
Pubished in - Volume 5 | Issue 2 | April 2017
DOI (Digital Object Identifier) -   
Publisher - IJEDR (ISSN - 2321-9939)
Cite this Article
  Vipul V. Nandedkar,  Nigrodh B. Narnaware,   " Design and Implementation of a Cockcroft-Walton voltage Multiplier circuit", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.5, Issue 2, pp.261-264, April 2017, Available at :http://www.ijedr.org/papers/IJEDR1702044.pdf
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