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New Cascaded H-Bridge Multilevel Inverter topology with reduced number of switches using artificial neural network technique
Parveen Nisha.M.G.,  Pauline Jothi Kiruba.G.J.,  Mercy.P.
This paper deals Cascaded H-bridge multilevel inverter topology with reduced number of switches using artificial neural network technique. This topology consists of lower blocking voltage on switches and it requires less number of dc voltage sources, power switches which results in decrease the complexity and total cost of the inverter. A new algorithm is used to determine the magnitude of dc voltage sources for the generation of all voltage levels. Artificial Neural Network (ANN) is trained by the back-propagation algorithm of the Mean Square Error between the output and the desired value. The performances of the proposed topology using artificial neural network technique are simulated using MATLAB simulink and hardware implementation also done.
Keywords- Cascaded multilevel inverter, H-bridge, Artificial neural network, Multicarrier pulse width modulation.
Unique Identification Number - IJEDR1702275Page Number(s) - 1747-1755Pubished in - Volume 5 | Issue 2 | June 2017DOI (Digital Object Identifier) -    Publisher - IJEDR (ISSN - 2321-9939)
Cite this Article
Parveen Nisha.M.G.,  Pauline Jothi Kiruba.G.J.,  Mercy.P.,   "New Cascaded H-Bridge Multilevel Inverter topology with reduced number of switches using artificial neural network technique"
, International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.5, Issue 2, pp.1747-1755, June 2017, Available at :http://www.ijedr.org/papers/IJEDR1702275.pdf