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INTERNATIONAL JOURNAL OF ENGINEERING DEVELOPMENT AND RESEARCH
(International Peer Reviewed,Refereed, Indexed, Citation Open Access Journal)
ISSN: 2321-9939 | ESTD Year: 2013

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Paper Title
A 32 Bitmac Unit Design Using DADDA Mutliplier and Reversible Logic (DKG) Gate
Authors
  Y.Bharat kumar,  G.Kiran kumar

Abstract
In digital signal processing, the multiply–accumulate is the common and most important operation as it is used in number of computations. Multiplier–accumulator ( MAC unit) is the hardware unit which performs this operation. Multiply-Accumulate (MAC) unit has it’s major applications in MP, logic units and digital signal processors, as it is the unit which determines the delay of the overall system. MAC units are involved in designs such as Computation which are Non linear like FFT/IFFT, Discrete Cosine or wavelet Transform (DCT). A Large variety of techniques have been developed in algorithmic and structural levels to intensify the efficiency of the multiplier which is achieved by reducing the partial products and the approaches used in their addition. Multiply Accumulate (MAC) unit are used in developing for various high performance application. So, for reducing the power and area constraints the MAC unit will be implemented by using DADDA Multiplier algorithm. For this XILINX ISE 14.1 tool is used.

Keywords- MAC unit, DADDA Multiplier, Vedic Multiplier, Reversible logic gates, Kogge stone Adder.
Publication Details
Unique Identification Number - IJEDR1702309
Page Number(s) - 1989-1994
Pubished in - Volume 5 | Issue 2 | June 2017
DOI (Digital Object Identifier) -   
Publisher - IJEDR (ISSN - 2321-9939)
Cite this Article
  Y.Bharat kumar,  G.Kiran kumar,   "A 32 Bitmac Unit Design Using DADDA Mutliplier and Reversible Logic (DKG) Gate", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.5, Issue 2, pp.1989-1994, June 2017, Available at :http://www.ijedr.org/papers/IJEDR1702309.pdf
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