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ISSN: 2321-9939 | ESTD Year: 2013

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Paper Title
Design of low voltage low power high gain full swing operational amplifier
  R Anil Kumar,  Komira Yakaiah,  Thummanapally Manusha

In this paper a design of conventional two stage CMOS operational amplifier was designed with all the transistors operated in sub threshold region, which allows low supply voltages with low power dissipation. When the transistors are operating in sub threshold region then there is an advantage of low power and low input bias current but there exist a problem in gain and full swing of the op-amp, the present approach overcomes this and maintains good tradeoff between gain, power consumption, and UGF with output swing ±Vdc. The proposed operational amplifier operates at ±450mv power supply with 1µAmp input bias current and the design is carried out in 180nM CMOS cadence analog virtuoso spectre simulator.

Keywords- CMOS OP-Amp, Full swing high gain Op-Amp, Operational-Amplifier, Sub threshold, 180nM.
Publication Details
Unique Identification Number - IJEDR1702316
Page Number(s) - 2027-2031
Pubished in - Volume 5 | Issue 2 | June 2017
DOI (Digital Object Identifier) -   
Publisher - IJEDR (ISSN - 2321-9939)
Cite this Article
  R Anil Kumar,  Komira Yakaiah,  Thummanapally Manusha,   "Design of low voltage low power high gain full swing operational amplifier", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.5, Issue 2, pp.2027-2031, June 2017, Available at :http://www.ijedr.org/papers/IJEDR1702316.pdf
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