Design Of Carry Skip Adder Using High Speed Skip Logic In Xilinx Platform

  P. Prabakaran,  B. Theeban Chakkaravarthy,  G. Manikannan

The portable equipment’s such as cellular phones, Personal Digital Assistant (PDA), and notebook personal computer, arise the need of effective circuit area and power efficient VLSI circuits. Addition is the most common and often used arithmetic operation in digital computers and also, it serves as a building block for synthesis all other arithmetic operations. The carry skip adder(CSKA) structure that has a higher speed yet lower energy consumption with the conventional one. The speed enhancement is achieved by applying cancatenation schemes improve the efficiency of the conventional CSKA(conv-CSKA) structure. In addition instead of utilizing multiplexer logic, the proposed structure makes use of AND-OR-invert(AOI) and OR-AND-invert(OAI) compound gates for the skip logic.

Keywords- carry skip adder, energy efficient, higher performance.

Unique Identification Number - IJEDR1704043
Page Number(s) - 281-287
Pubished in - Volume 5 | Issue 4 | October 2017
DOI (Digital Object Identifier) -   
Publisher - IJEDR (ISSN - 2321-9939)

  P. Prabakaran,  B. Theeban Chakkaravarthy,  G. Manikannan,   "Design Of Carry Skip Adder Using High Speed Skip Logic In Xilinx Platform", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.5, Issue 4, pp.281-287, October 2017, Available at :http://www.ijedr.org/papers/IJEDR1704043.pdf