Design and Implementation of SPI Module in Verilog HDL using FPGA Design Flow

  Rahul Jandyam,  Sanjay Reddy Kandi,  Umar Farooq Mohammad

Communication has always been one of the topmost concerns for human civilization. Ever since speech has originated millennia ago, it has evolved in a variety of ways from speech to symbols to cave paintings. With the advent of modern technology, the range and efficiency of communication has increased many fold. Nonetheless, new methods and ways were required to improve the range of communication and retain the accuracy of the information. Then came numerous protocols into existence to meet the demands like I2C, Zigbee, UART, SPI etc. The objective of this paper is to design and implement the SPI communication protocol module using FPGA design flow in Verilog HDL. The Serial Peripheral Interface module allows synchronous, full duplex serial communication between the microcontroller unit and peripheral devices. The module was designed and simulated using Verilog HDL in Xilinx ISE design Suite.

Keywords- SPI, FPGA Design Flow, Verilog HDL

Unique Identification Number - IJEDR1704175
Page Number(s) - 1090-1094
Pubished in - Volume 5 | Issue 4 | December 2017
DOI (Digital Object Identifier) -    http://doi.one/10.8/ijedr.17494
Publisher - IJEDR (ISSN - 2321-9939)

  Rahul Jandyam,  Sanjay Reddy Kandi,  Umar Farooq Mohammad,   "Design and Implementation of SPI Module in Verilog HDL using FPGA Design Flow", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.5, Issue 4, pp.1090-1094, December 2017, Available at :http://www.ijedr.org/papers/IJEDR1704175.pdf