Performance Evaluation of Bit Flipping and Sum Product Algorithm of LDPC coder in Different Channel Environment

  Jigisha Patel,  Neeta Chapatwala,  Mrugesh Patel

Low Density Parity Check (LDPC) codes are one of the block coding techniques that can approach the Shannon’s limit within a fraction of a decibel for high block lengths. In many digital communication systems, these codes have strong competitors of turbo codes for error control. LDPC codes performance depends on the excellent design of parity check matrix and many diverse research methods have been used by different study groups to evaluate the performance. Unlike many other classes of codes, LDPC codes are already equipped with a fast, probabilistic decoding algorithm. This makes LDPC codes not only attractive from a theoretical point of view, but also very suitable for practical applications. This paper throws hard decision and soft decision algorithm of LDPC. The hard decision algorithm contains Bit flipping algorithm and Soft decoding algorithm contains Sum product algorithm which is used to correct burst error. Sum Product algorithm is also called as belief propagation. Bit flipping and Sum Product algorithms are explained and can be implemented for the generated parity check matrix of (648,324) for LDPC code with code rate 1/2.

Keywords- Encoder, Bit Flipping Algorithm, Sum Product Algorithm, AWGN, Rayleigh and Rician Channel

Unique Identification Number - IJEDR1402153
Page Number(s) - 2234-2240
Pubished in - Volume 2 | Issue 2 | June 2014
DOI (Digital Object Identifier) -   
Publisher - IJEDR (ISSN - 2321-9939)

  Jigisha Patel,  Neeta Chapatwala,  Mrugesh Patel,   "Performance Evaluation of Bit Flipping and Sum Product Algorithm of LDPC coder in Different Channel Environment", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.2, Issue 2, pp.2234-2240, June 2014, Available at :http://www.ijedr.org/papers/IJEDR1402153.pdf