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A realisation of Fault tolerant ALU-with TMR method
Jaimini Patel,  Deepali H. Shah
This paper represents the fault tolerant ALU with Triple modular redundancy on FPGA. TMR technique is mitigating the single error upsets of the module. TMR method gives fault tolerant result but with penalty of area. TMR technique is used in aviation application and space application where radiation effects are takes place.
Keywords- Fault Tolerant, ALU, TMR(triple modular redundancy), FPGA, Xilinx ISE
Unique Identification Number - IJEDR1403057Page Number(s) - 3161-3164Pubished in - Volume 2 | Issue 3 | Sept 2014DOI (Digital Object Identifier) -    Publisher - IJEDR (ISSN - 2321-9939)
Cite this Article
Jaimini Patel,  Deepali H. Shah,   "A realisation of Fault tolerant ALU-with TMR method"
, International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.2, Issue 3, pp.3161-3164, Sept 2014, Available at :http://www.ijedr.org/papers/IJEDR1403057.pdf