Simulation and Analysis of CNTFETs based Logic Gates in HSPICE

  Neetu Sardana,  L.K.Ragha

Conventional CMOS technology provides a lot of opportunities in the field of electronic devices. After the invention of the MOSFET, continuous scaling of the device is going on as predicted by Moore in 1970. This reduction in device size is giving higher performance in terms of increased speed, lower power consumption at lower cost with greater chip density. The main disadvantage of scaling is channel length is also decreasing continuously leading to short channel effects(SCE) in nanoscales regime. To overcome these limitations many alternate devices are proposed. Among these various alternate devices, Carbon Nano Tube Field Effect Transistor (CNTFET) is found to be one of the most promising alternatives for MOSFET. The CNTFET is a field effect transistor in which Carbon Nano Tube(CNT) is used in the channel region. In this paper the standard model has been designed for, MOSFET like CNTFET devices. Various logic gates were designed using CNTFETs. Hspice simulations have been performed on the logic gates designed using the modeled CNTFET.

Keywords- Carbon Nano Tube Field Effect Transistor (CNTFET), Short Channel Effect (SCE), Power Delay Product (PDP)

Unique Identification Number - IJEDR1604100
Page Number(s) - 663-667
Pubished in - Volume 4 | Issue 4 | December 2016
DOI (Digital Object Identifier) -   
Publisher - IJEDR (ISSN - 2321-9939)

  Neetu Sardana,  L.K.Ragha,   "Simulation and Analysis of CNTFETs based Logic Gates in HSPICE", International Journal of Engineering Development and Research (IJEDR), ISSN:2321-9939, Volume.4, Issue 4, pp.663-667, December 2016, Available at :http://www.ijedr.org/papers/IJEDR1604100.pdf